1. Field of the Invention
The present invention relates to a PLL circuit that utilizes a voltage controlled oscillator which is built into a semiconductor integrated circuit, and which has little dispersion in free-running frequency.
2. Prior Art
In recent years, reduction in accessory parts and cost for adjustment has come into demand, as the price of television receivers and the like has lowered. In addition, oscillators which used to be difficult to completely build into an integrated circuit have been integrated, and the required performance thereof has also been increased.
From among these, the degree of stability of free-running frequency in a voltage controlled oscillator that forms a PLL circuit greatly influences the performance of the formed PLL circuit, and in some cases, causes an unlocking phenomenon. Therefore, it is particularly important to stabilize free-running frequency.
Furthermore, in some cases, a number of frequencies are applied, depending on the applied system. In such a case, a system which makes switching of free-running frequency possible and which achieves stability in free-running frequency becomes necessary. The video intermediate frequency in a video detection circuit of a television receiver, for example, differs between Japan, where the frequency is 58.75 MHz, and the United States, where the frequency is 45.75 MHz. Such a video detection circuit needs to correspond to the two types of input frequencies within the same integrated circuit in order to lower the production costs. In addition, the reference frequency signal source also needs to correspond to a number of frequencies, for example, 4 MHz and 3.58 MHz in the case of a television receiver.
In the following, a PLL circuit where stabilization in the frequency is achieved according to the prior art is described in reference to FIG. 4.
The PLL circuit according to the prior art is formed of first and second PLL circuit parts 100 and 101. First PLL circuit part 100 is formed of a first phase detector 1, a first low pass filter 2 and a first voltage controlled oscillator 3. Second PLL circuit part 101 is formed of a second voltage controlled oscillator 7, a second phase detector 9, a second low pass filter 6 and a frequency control circuit 5 for supplying a frequency control voltage to first and second voltage controlled oscillators 3 and 7.
The operation of the conventional PLL circuit which is formed as described above is described below. In FIG. 4, the output of voltage controlled oscillator 3 is inputted into phase detector 1, and a phase comparison is carried out between the output and an input signal that is inputted into a signal input terminal 11. Then, the results of phase comparison by phase comparator 1 are smoothed by low pass filter 2 to a frequency control voltage, which is then fed back to voltage controlled oscillator 3. As a result of this, the configuration of PLL circuit part 100 allows for an operation where the frequency of the input signal into signal input terminal 11 and the frequency of voltage controlled oscillator 3 become equal. At this time, the input signal into signal input terminal 11 and the output signal of voltage controlled oscillator 3 have a phase difference of 90 degrees.
Meanwhile, the reference frequency signal that has been inputted into a reference frequency signal input terminal 13 is inputted into phase detector 9, and the difference in the frequency (phase difference) between the reference frequency signal and the output of voltage controlled oscillator 7 is detected. The output of phase detector 9 is inputted into low pass filter 6. The output of a crystal oscillator or the like of which the frequency stability is excellent is conventionally utilized as the reference frequency signal. Low pass filter 6 smoothes the output of phase detector 9, which is supplied to voltage controlled oscillator 7 as a frequency control voltage through frequency control circuit 5. As a result of this, the configuration of PLL circuit part 101 allows for an operation where the frequency of voltage controlled oscillator 7 becomes equal to the frequency of the reference frequency signal.
Here, voltage controlled oscillator 3 and voltage controlled oscillator 7 have the same circuit configuration, and are formed using the same elements. In addition, circuits for outputting frequency control voltages to voltage controlled oscillator 3 and voltage controlled oscillator 7 have the same circuit configuration and are respectively formed using the same elements, in frequency control circuit 5.
Next, the operation of frequency control circuit 5 is described using the example of FIG. 5. In FIG. 5, symbol 22 indicates a terminal into which the output of low pass filter 6 is inputted. Symbol 23 indicates a power supply terminal. Symbol 24 indicates a reference voltage terminal. The reference voltage that is provided to reference voltage terminal 24 is set so that the output of low pass filter 6 adjusts the oscillatory frequency range of voltage controlled oscillators 3 and 7 to a desired frequency range. Symbols 25 and 26 indicate output terminals of frequency control circuit 5, which are respectively connected to voltage controlled oscillators 3 and 7. Symbol 27 indicates a ground terminal. In addition, symbols I1 and I2 indicate constant current sources. Symbols Q4 and Q5 indicate PNP transistors that form a differential amplifier for converting a voltage to a current. Symbols Q1, Q2 and Q3 indicate NPN transistors that form a current mirror circuit. Symbols R1, R2, R3 and R4 indicate resistors.
In this frequency control circuit, the output of the low pass filter that is inputted into terminal 22 is compared with the reference voltage of reference voltage terminal 24, and is converted to a frequency control current so as to be inputted into NPN transistor Q1 and resistor R1. Gain gm of this voltage current conversion is determined by resistor R4. The frequency control current that has been inputted into NPN transistor Q1 and resistor R1 is supplied to voltage controlled oscillators 3 and 7 via output terminals 25 and 26 by means of NPN transistors Q2 and Q3 that form the current mirror circuit, and thereby, the oscillation frequencies of voltage controlled oscillators 3 and 7 are controlled.
Phase comparison is carried out between the output frequency of voltage controlled oscillator 7 and the signal of the reference frequency that is inputted into reference frequency signal input terminal 13 in phase comparator 9, and thereby, the output frequency is synchronized with the reference frequency signal. Therefore, a correcting current corresponding to a shift from the reference frequency in the case where a change in the temperature or dispersion during the process of mass production of semiconductors exists is supplied from transistor Q3 of FIG. 5. As a result of this, the output frequency of voltage controlled oscillator 7 becomes very stable, irrespectively of temperature and dispersion during the process.
Here, in the case where voltage controlled oscillators 3 and 7 have the same elements and the same configuration, being formed of NPN transistors Q2 and Q3 and resistors R2 and R3 of the same elements, a correcting current that is equal to that of voltage controlled oscillator 7 is supplied to voltage controlled oscillator 3 from NPN transistor Q2 of FIG. 5. As a result, the free-running frequency of voltage controlled oscillator 3 becomes very stable, even in the case where there is a change in the temperature and dispersion during the process.
Meanwhile, in response to the input signal that is inputted into signal input terminal 11, PLL circuit 100 locks by means of the frequency control current from low pass filter 2, in the state where the free-running frequency of voltage control oscillator 3 is stable. As a result, it is possible for voltage controlled oscillator 3 to operate stably without unlocking, even in the case where there is a change in the temperature and dispersion during the process.
In this configuration, the oscillatory frequency of voltage controlled oscillator 3 is controlled by a frequency control voltage which has the same temperature dependency and dispersion dependency as the oscillatory frequency of voltage controlled oscillator 7. The oscillatory frequency of voltage controlled oscillator 7 is made to be equal to the reference frequency by means of PLL circuit part 101, and has extremely little dependency on temperature and dispersion of elements. Accordingly, the free-running frequency of voltage controlled oscillator 3 which is controlled by the frequency control voltage that is the same as that of voltage controlled oscillator 7 has extremely little fluctuation, irrespectively of temperature and mass production, thus making it possible to achieve stabilization.
Patent Document 1: Japanese Unexamined Patent Publication H10 (1998)-256899
However, the PLL circuit according to the prior art which is formed as shown in FIG. 4, cannot handle a case where there are a number of input frequencies and reference frequency signal sources. Therefore, in order to apply this type of PLL circuit to a television receiver and the like, it is necessary to prepare PLL circuits having voltage controlled oscillators and reference frequency signal sources for different frequencies in accordance with the applied frequencies, which is extremely disadvantageous, taking reduction in costs into consideration.